





FL127SIF10 S25FL127S SOP8
Programming (0.8 MBps)
256- or 512-byte page programming buffer options
Quad-input page programming (QPP) for slow clock systems
Automatic ECC -internal hardware error correction code generation with single bit error correction
Erase (0.5 MBps)
Hybrid sector size option – physical set of sixteen 4-KB sectors at top or bottom of address space with all
remaining sectors of 64 KB
Uniform sector option – always erase 256-KB blocks for software compatibility with higher density and future
devices.
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توضیحات
Description
128 mbit (16 mbyte) mirrorbit flash non-volatile memory
S25FL127S 128 Mbit (16 Mbyte) MirrorBit® Flash Non-Volatile Memory CMOS 3.0 Volt Core
Serial Periphe
of Spansion data sheet designations are presented here to highlight their presence and definitions.
Features
CMOS 3.0 V core
Density
128 Mb (16 MB)
SPI with multi-I/O
SPI clock polarity and phase modes 0 and 3
Extended addressing: 24- or 32-bit address options
Serial command set and footprint compatible with S25FL-A, S25FL-K, and S25FL-P SPI families
Multi I/O command set and footprint compatible with S25FL-P SPI family
READ commands
Normal, Fast, Dual, Quad
AutoBoot – power up or reset and execute a Normal or Quad read command automatically at a preselected
address
Common flash interface (CFI) data for configuration information.
توضیحات تکمیلی
Package |
SOP-8 |
---|---|
کیفیت |
چین درجه1 |
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دیدگاهها
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